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IGCSE · Cambridge (CIE) · 0478

Complete a truth table from a circuit

Trace gate outputs across every input combination to fill the output column.

Cambridge IGCSE Computer Science 0478 · Boolean logic · 2026–2028 Version 6 · Topic 10
Exam scope and assessment notes

This original learning sequence follows Topic 10 of Cambridge IGCSE Computer Science 0478, 2026–2028 syllabus Version 6. It covers standard symbols and functions for NOT, AND, OR, NAND, NOR and XOR/EOR, and translation among statements, expressions, circuits and truth tables. NOT has one input; other gates have at most two. Circuit practice is limited to three inputs and one output and keeps the requested design without simplification. Lessons and checks support learning but do not award an official Cambridge grade. Full timed-paper practice, practical programming in an executable workspace and human subject-teacher review remain outstanding; the separate 2029–2031 syllabus is not mapped here.

Before you begin

  • Be able to read binary 0 and 1 as the two possible logic values. Each lesson introduces the gate or translation skill it uses.

Work on paper. Try each question before revealing help, and explain why your method works.

Quick readiness check

What should you do with a multi-gate circuit for each row?

What you will learn

  • Read the signal path through a circuit
  • Calculate intermediate results
  • Complete all rows consistently
Truth table for A AND NOT B
ABNOT BA AND NOT B
0010
0100
1011
1100
Evaluate NOT B first, then AND that result with A. The output is 1 only for A = 1 and B = 0.

Core idea

A circuit's output is determined row by row. For each input combination, calculate the output of the first gate, then use that intermediate result at the next gate. One intermediate column can prevent sign or connection errors.

In a logic circuit, 1 represents TRUE and 0 represents FALSE. A gate applies a defined rule to its input value or values and produces one binary output.

A reliable method

List all 2ⁿ input combinations. Label columns for each intermediate gate output, calculate from left to right through the circuit, then fill the final output. Check a row where an input changes and confirm only dependent signals change.

Keep the given statement, expression, diagram or table in view while working. Check each row or connection against the rule, and preserve the stated circuit structure; the syllabus does not ask you to simplify it.

Pause and explain

Three binary inputs require how many table rows?

Put the idea to work

Worked example

A and B enter AND; that output enters NOT to make Y. Find Y for 00, 01, 10, 11.

Show the worked solution
  1. AND outputs 0 on 00,01,10 and 1 on 11.
  2. Invert each AND result.
  3. The final Y column is 1,1,1,0.

Answer Y=NAND(A,B): 1, 1, 1, 0.

Try a topic test

Choose Easy, Normal or Difficult. Save your answers and open worked review after finishing.

Test this topic →

From guided practice to a new situation

Write your answer and reasoning first. Use a hint only if you are stuck. The model solution is for self-checking; your written work is not automatically marked.

1 · Guided

A and B feed OR; its output feeds NOT. Find Y for inputs 00 and 10.

Give me a hint

Evaluate OR then invert.

Compare my reasoning
  1. For 00, OR=0 then NOT=1.
  2. For 10, OR=1 then NOT=0.

Y=1 for 00 and Y=0 for 10.

Look for these in your work

  • First row
  • Second row
  • Signal order
2 · Independent

For Y=(A AND B) OR C, find Y for A=1, B=1, C=0.

Give me a hint

Calculate A AND B before OR with C.

Compare my reasoning
  1. A AND B = 1.
  2. Combine 1 OR 0.
  3. The output is 1.

Y=1.

Look for these in your work

  • Intermediate AND
  • Final OR
3 · Transfer

A circuit has X=NOT B and Y=A XOR X. Find Y for A,B = 0,0; 0,1; 1,0; 1,1.

Give me a hint

Create an intermediate column X first.

Compare my reasoning
  1. For B values 0,1,0,1, X is 1,0,1,0.
  2. Compare each A with X; XOR is 1 when they differ.
  3. The resulting outputs are 1,0,0,1.

Y: 1, 0, 0, 1.

Look for these in your work

  • NOT B column
  • XOR evaluated
  • Four rows

Common mistakes

  • Reporting the intermediate gate rather than final output
  • Skipping the inversion bubble
  • Using a different row order halfway through
Recall without your notes

What can you explain now?

For an AND followed by NOT circuit with A=B=1, what is the final output?

Compare with the explanation

0

AND first gives 1; NOT then gives 0.

After trying it yourself, choose your next review. This is your self-assessment.

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Make it stick

Why do you calculate intermediate gate outputs before the final output?

If you needed the solution, close it and solve the problem again from a blank page. A correct answer is stronger when you can explain the reason for each step.

Keep learning Computer Science

Course scope and assessment

165 original lessons map the listed objectives across all 10 main topics in the 2026–2028 Version 6 syllabus, with worked explanations and guided, independent and transfer practice. This is mapped teaching coverage, not proof of full exam readiness. Three earlier starter lessons remain available but are not counted as syllabus-mapped teaching. Practical programming experience in an executable browser workspace, full timed-paper practice, human subject-teacher review and the separate 2029–2031 syllabus remain outstanding. Practice is self-checked and does not award an official Cambridge grade.

StudyForA · Learn with understanding

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