15 Processors, virtual machines and advanced logic
Compare processor architectures, parallel computer models and virtual machines, then simplify Boolean systems.
Mapped to Cambridge International AS & A Level Computer Science 9618, 2027–2029 Version 2. These original lessons and self-checks are independent study support; they are not Cambridge papers, official marks or grades. The course does not yet provide a timed four-paper simulation or a locked-down Paper 4 programming environment.
Before you begin
- Use the 2027–2029 syllabus for your exam year. AS candidates study Sections 1–12; A Level candidates study Sections 1–20. Paper 4 uses a programming language chosen from Python, Java or Visual Basic in console mode.
Work on paper. Try each question before revealing help, and explain why your method works.
Quick readiness check
What does a flip-flop store?
What you will learn
- Explain the key representations, structures or processes in this syllabus section
- Apply the method to a new computer-science example
- Justify a design choice and check its limits
Architecture trades instruction complexity for implementation choices
RISC processors use a smaller, simpler instruction set and commonly support pipelining; CISC processors provide more complex instructions. These are design tendencies, not a guarantee that one processor is always faster. Interrupt handling saves the current state and transfers control to an interrupt service routine before returning.
SISD uses one instruction stream on one data stream; SIMD applies an instruction across many data values; MISD applies multiple instruction streams to the same data stream; MIMD uses multiple instruction and data streams. Massively parallel systems coordinate many processing units and can be effective for suitable independent tasks.
A virtual machine presents a software-defined computer environment. It can isolate systems and run different guest environments, but consumes host resources and depends on the virtualisation layer.
Boolean algebra reduces circuit complexity
Boolean variables take values 0 or 1. AND, OR and NOT obey identities including De Morgan's laws: NOT(A AND B) = NOT A OR NOT B, and NOT(A OR B) = NOT A AND NOT B.
A flip-flop stores one bit of state. Karnaugh maps group adjacent 1-cells (or 0-cells for a product-of-sums form) to derive a simpler expression. Groups must have power-of-two sizes and may wrap across map edges; overlapping can be useful.
Pause and explain
Simplify NOT(A OR B).
Worked example
Simplify NOT(A AND B) using De Morgan's law.
Show the worked solution
- Apply the law that negates a conjunction.
- Change AND to OR.
- Negate each input.
Answer NOT A OR NOT B.
Try a topic test
Choose Easy, Normal or Difficult. Save your answers and open worked review after finishing.
Test this topic →From guided practice to a new situation
Write your answer and reasoning first. Use a hint only if you are stuck. The model solution is for self-checking; your written work is not automatically marked.
A graphics task applies the same operation independently to thousands of pixels. Which Flynn architecture may suit it, and why?
Give me a hint
Look for one instruction repeated over many data items.
Compare my reasoning
- The operation is the same for each pixel.
- The data items differ, but the instruction can be shared.
- SIMD applies a single instruction stream to multiple data values.
SIMD, because the same instruction can operate on many pixel values.
Look for these in your work
- Repeated operation recognised
- Data parallelism stated
- SIMD selected
Apply De Morgan's law to NOT(A OR (B AND C)).
Give me a hint
Negate the outer OR, then negate the second input as a whole.
Compare my reasoning
- NOT(A OR X) becomes NOT A AND NOT X.
- Here X is B AND C, so NOT X = NOT B OR NOT C.
- Keep the resulting operator structure explicit.
NOT A AND (NOT B OR NOT C).
Look for these in your work
- Outer De Morgan step
- Inner expression negated
- Parentheses retained
A 3-variable Karnaugh map has 1s at minterms 000, 001, 100 and 101. Derive a simplified term and explain the grouping.
Give me a hint
Group four adjacent cells; variables that change within the group cancel.
Compare my reasoning
- Across these cells, the first and third bits vary.
- The middle bit stays 0 in every cell.
- The group therefore simplifies to NOT B, using the stated bit order A,B,C.
NOT B.
Look for these in your work
- All four cells grouped
- Invariant variable identified
- Term simplified
Common mistakes
- Claiming every RISC processor is faster than every CISC processor.
- Mixing up SISD, SIMD, MISD and MIMD stream counts.
- Grouping non-adjacent Karnaugh map cells without a valid edge wrap.
What can you explain now?
Which architecture applies one instruction to multiple data values?
Compare with the explanation
SIMD
SIMD stands for single instruction, multiple data.
After trying it yourself, choose your next review. This is your self-assessment.
Your review choice appears on Today. Sign in to sync it across devices.
Make it stick
How do RISC/CISC, parallel architectures, virtualisation, flip-flops and Boolean simplification relate to hardware design?
If you needed the solution, close it and solve the problem again from a blank page. A correct answer is stronger when you can explain the reason for each step.